Second Architecture. Given that our main goal was to accelerate the kernel function computation, we carried out the necessary problem partitioning. Recall that the input of the training algorithm is a dataset which comprises several data instances and whose size ranges from a few Megabytes to several Gigabytes. Furthermore, this dataset is transformed into a two dimensional data structure with dimensions mxn, where m denotes the number of data instances and n shows the maximum number of features. Due to the fact that producing a dot-product is completely independent from producing another, we divided the mxn dataset into chunks. Each of these chunks is processed in parallel with the others. Finally, a kernel function does not only require the result of the dot-product of a data instance with another, but also the dot product of each data instance with itself. These separate dot products are also produced in parallel to reduce the total kernel function computation time from T to approximately, where T shows the hardware execution time with one hardware core and 7 denotes the number of chunks each of which is transformed to a one-dimensional vector. In particular, the two-dimensional dataset is transformed into seven vectors in a zig-zag order, i.e. (1,1), (2,1), … ,(14,1),(1,2),(2,2)...(k-1,l),(k,l), where k and l the last row and last column of a chunk respectively. The reason for this data arrangement lies in the fact that we want to overlap the feedback created by the adder in the dot product with useful computations. An overview of our new system is shown in Figure 14. The hardware module undertakes the kernel function computation. Data instances i and j of the working set are streamed into the DFE. Thus, the reconfigurable system does not depend on the feature space of the training dataset, but is fully parameterized; it changes dynamically the dimensions of the data structures according to the needs of the application. Another high-level detail is that the training dataset is not inserted into the DFE from the CPU in streams. More specifically, the training data samples are stored in the beginning of the program into the off- chip DRAM (LMem). Then, the LMem feeds the Kernel with a data element per time instance, and the same applies for the CPU. Figure 104: SVM Kernel Computation System Overview The kernel computation of one parallel hardware unit is shown in Figure 15. Due to the fact that we pipeline 7 streams in this architecture, we have 7 parallel processing units t...
