Microbenchmarks Clause Samples
Microbenchmarks. The goal of this effort is to capture low-level system performance such as the bandwidth and latency characteristics for different levels of memory hierarchies under various types of read and write operations.
Microbenchmarks. In this section we present the results of three synthetic benchmarks intended to characterize both architectures and to highlight interesting behaviors. The synthetic benchmarks were written using Assembler language in order to have complete control of the software running on top of the architectural templates. They consist of a set of iterated ALU or MEMORY instructions performed to highlight a specific behavior. All the synthetic benchmarks share the common structure shown in Listing 1 below. mov r6, N_LOOP mov r5, #0 _loop: cmp r5, r6 blt _body b _end _body: ... add r5, r5, #1 b _loop _end: ...