Common use of Data Structures Clause in Contracts

Data Structures. The basic building blocks for communication across the interface are the Endpoint Descriptor (ED) and Transfer Descriptor (TD). The Host Controller Driver assigns an Endpoint Descriptor to each endpoint in the system. The Endpoint Descriptor contains the information necessary for the Host Controller to communicate with the endpoint. The fields include the maximum packet size, the endpoint address, the speed of the endpoint, and the direction of data flow. Endpoint Descriptors are linked in a list. A queue of Transfer Descriptors is linked to the Endpoint Descriptor for the specific endpoint. The Transfer Descriptor contains the information necessary to describe the data packets to be transferred. The fields include data toggle information, shared memory buffer location, and completion status codes. Each Transfer Descriptor contains information that describes one or more data packets. The data buffer for each Transfer Descriptor ranges in size from 0 to 8192 bytes with a maximum of one physical page crossing. Transfer Descriptors are linked in a queue: the first one queued is the first one processed. Each data transfer type has its own linked list of Endpoint Descriptors to be processed. Figure 3- 3, Typical List Structure, is a representation of the data structure relationships. Head Ptr ED ED ED ED TD TD TD TD TD TD TD The head pointers to the bulk and control Endpoint Descriptor lists are maintained within the operational registers in the HC. The Host Controller Driver initializes these pointers prior to the Host Controller gaining access to them. Should these pointers need to be updated, the Host Controller Driver may need to halt the Host Controller from processing the specific list, update the pointer, then re-enable the HC. The head pointers to the interrupt Endpoint Descriptor lists are maintained within the HCCA. There is no separate head pointer for isochronous transfers. The first isochronous Endpoint Descriptor simply links to the last interrupt Endpoint Descriptor. There are 32 interrupt head pointers. The head pointer used for a particular frame is determined by using the last 5 bits of the Frame Counter as an offset into the interrupt array within the HCCA. The interrupt Endpoint Descriptors are organized into a tree structure with the head pointers being the leaf nodes. The desired polling rate of an Interrupt Endpoint is achieved by scheduling the Endpoint Descriptor at the appropriate depth in the tree. The higher the polling rate, the closer to the root of the tree the Endpoint Descriptor will be placed since multiple lists will converge on it. Figure 3-4 illustrates the structure for Interrupt Endpoints. The Interrupt Endpoint Descriptor Placeholder indicates where zero or more Endpoint Descriptors may be enqueued. The numbers on the left are the index into the HCCA interrupt head pointer array. Interrupt 6 Head 22 Pointers 14 Interrupt Endpoint Descriptor Placeholder Figure 3-5 is a sample Interrupt Endpoint schedule. The schedule shows two Endpoint Descriptors at a 1-ms poll interval, two Endpoint Descriptors at a 2-ms poll interval, one Endpoint at a 4-ms poll interval, two Endpoint Descriptors at an-8 ms poll interval, two Endpoint Descriptors at a 16-ms poll interval, and two Endpoint Descriptors at a 32-ms poll interval. Note that in this example unused Interrupt Endpoint Placeholders are bypassed and the link is connected to the next available Endpoint in the hierarchy. Interrupt 22 Head 14 Pointers 30 Interrupt Endpoint Descriptor

Data Structures. The basic building blocks for communication across the interface are the Endpoint Descriptor (ED) and Transfer Descriptor (TD). The Host Controller Driver assigns an Endpoint Descriptor to each endpoint in the system. The Endpoint Descriptor contains the information necessary for the Host Controller to communicate with the endpoint. The fields include the maximum packet size, the endpoint address, the speed of the endpoint, and the direction of data flow. Endpoint Descriptors are linked in a list. A queue of Transfer Descriptors is linked to the Endpoint Descriptor for the specific endpoint. The Transfer Descriptor contains the information necessary to describe the data packets to be transferred. The fields include data toggle information, shared memory buffer location, and completion status codes. Each Transfer Descriptor contains information that describes one or more data packets. The data buffer for each Transfer Descriptor ranges in size from 0 to 8192 bytes with a maximum of one physical page crossing. Transfer Descriptors are linked in a queue: the first one queued is the first one processed. Each data transfer type has its own linked list of Endpoint Descriptors to be processed. Figure 3- 3-3, Typical List Structure, is a representation of the data structure relationships. Head Ptr ED ED ED ED TD TD TD TD TD TD TD The head pointers to the bulk and control Endpoint Descriptor lists are maintained within the operational registers in the HC. The Host Controller Driver initializes these pointers prior to the Host Controller gaining access to them. Should these pointers need to be updated, the Host Controller Driver may need to halt the Host Controller from processing the specific list, update the pointer, then re-enable the HC. The head pointers to the interrupt Endpoint Descriptor lists are maintained within the HCCA. There is no separate head pointer for isochronous transfers. The first isochronous Endpoint Descriptor simply links to the last interrupt Endpoint Descriptor. There are 32 interrupt head pointers. The head pointer used for a particular frame is determined by using the last 5 bits of the Frame Counter as an offset into the interrupt array within the HCCA. The interrupt Endpoint Descriptors are organized into a tree structure with the head pointers being the leaf nodes. The desired polling rate of an Interrupt Endpoint is achieved by scheduling the Endpoint Descriptor at the appropriate depth in the tree. The higher the polling rate, the closer to the root of the tree the Endpoint Descriptor will be placed since multiple lists will converge on it. Figure 3-4 illustrates the structure for Interrupt Endpoints. The Interrupt Endpoint Descriptor Placeholder indicates where zero or more Endpoint Descriptors may be enqueued. The numbers on the left are the index into the HCCA interrupt head pointer array. Interrupt 6 Head 22 Pointers 14 Interrupt Endpoint Descriptor Placeholder Figure 3-5 is a sample Interrupt Endpoint schedule. The schedule shows two Endpoint Descriptors at a 1-ms poll interval, two Endpoint Descriptors at a 2-ms poll interval, one Endpoint at a 4-ms poll interval, two Endpoint Descriptors at an-8 ms poll interval, two Endpoint Descriptors at a 16-ms poll interval, and two Endpoint Descriptors at a 32-ms poll interval. Note that in this example unused Interrupt Endpoint Placeholders are bypassed and the link is connected to the next available Endpoint in the hierarchy. Interrupt 22 Head 14 Pointers 30 Interrupt Endpoint Descriptor