Common use of Channel Clause in Contracts

Channel. If this value is set to zero, then packets will be traced for all logical channels. If this value is non-zero and a logical channel is specified, then only packets received and transmitted on this selected channel will be traced. DATA: Offset 0x00 miscellaneous monitor configuration bits as follows: bit 0 if reset, then the dataline monitor is deactivated. If set, then the dataline monitor is activated. bit 1 if set, then each traced frame will include a millisecond time stamp. Note that this time stamp rotates between 0 and 65535 milliseconds. bit 2 if set, then the trace delay mode is activated. The trace delay mode prevents trace frames from being discarded due to limited on-board trace buffering. In effect, if the delay mode is enabled, then the actual transmission of HDLC frames is slowed down on the adapter to keep pace with the rate at which the application is reading trace frames from the board. bit 3 if set, then X.25 Data packets will be traced. bit 4 if set, then X.25 Supervisory packets will be traced. bit 5 if set, then X.25 Asynchronous packets will be traced. bit 6 if set, then all HDLC level frames will be traced. Offset 0x01 the trace deactivation timer. This timer is used in conjunction with the trace delay mode and automatically deactivates the trace in the case where the application does not read trace frames from the board at least once per defined deacitivation period. RETURN_ CODE: 0x00 The action has been performed successfully. 0x0A See Section "Notes on Return Codes" for further details. BUFFER-

Channel. If this value is set to zero, then packets will be traced for all logical channels. If I this value is non-zero and a logical channel is specified, then only packets received and transmitted on this selected channel will be traced. DATA: Offset 0x00 miscellaneous monitor configuration bits as follows: bit 0 if reset, then the dataline monitor is deactivated. If set, then the dataline monitor is activated. bit 1 if set, then each traced frame will include a millisecond time stamp. Note that this time stamp rotates between 0 and 65535 milliseconds. bit 2 if set, then the trace delay mode is activated. The trace delay mode prevents trace frames from being discarded due to limited on-board trace buffering. In effect, if the delay mode is enabled, then the actual actua transmission of HDLC frames is slowed down on the adapter to keep pace with the rate at which the application is reading trace frames from the board. bit 3 if set, then X.25 Data packets will be traced. bit 4 if set, then X.25 Supervisory packets will be traced. bit 5 if set, then X.25 Asynchronous packets will be traced. bit 6 if set, then all HDLC level frames will be traced. bit 7 if set, then the current trace configuration will be returned to the application. Note that the trace configuration will not be set if this bit is enabled. Offset 0x01 the trace deactivation timer. This timer is used in conjunction with the trace delay mode and automatically deactivates the trace in the case where the application does not read trace frames from the board at least once per defined deacitivation period. RETURN_ CODE: 0x00 The action has been performed successfully. 0x0A See Section "Notes on Return Codes" for further details. BUFFER-