ATS660 Sample Clauses

ATS660. In 10 MHz PLL external clock mode, the ATS660 can generate a sample clock between 110 and 130 MHz, in 1 MHz, steps from an external 10 MHz reference input. The sample data can be decimated by a factor of 1 to 100000. Call AlazarSetCaptureClock specifying EXTERNAL_CLOCK_10MHz_REF as the clock source identifier, the desired sample rate between 110 and 130 MHz in 1 MHz steps, and the decimation factor. The following code fragment shows how to generate a 32.5 MS/s sample rate from a 10 MHz PLL external clock input. AlazarSetCaptureClock( handle, // HANDLE –- board handle EXTERNAL_CLOCK_10MHz_REF, // U32 –- clock source Id 130000000, // U32 –- sample rate Id or value CLOCK_EDGE_RISING, // U32 –- clock edge Id 3 // U32 –- decimation );