IP Core definition

IP Core means a design (or parts thereof) solely for use in developing designs solely for use in Targeted Devices.

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IP Core means one or more design files (including encrypted net lists, test vectors, simulation models (VHDL and Verilog HDL), and other models either as source (obfuscated or in encrypted format) each designed to implement or support the design of a specific virtual design component (sometimes referred to a core or Logic Function) into a Programmable Logic Device, Field Programmable Gate Array (FPGA) or an Altera HardCopy® device together with any updates that Microtronix provides to You under this Agreement.

IP Core means the Helion Intellectual Property Core product made available to Licensee by Helion under the terms of this Agreement and identified in Exhibit A.

Examples of IP Core in a sentence

• PDR is a ratio of successful IP packet receptions to attempted IP packet transmissions ● PDR excludes packets, which are not delivered due in whole or in part to factors unrelated to Verizon’s Private IP Core Network.

• In further consideration of the license grants and access to the Licensed Technology, Licensee will pay Sonics running royalties with respect to each Device at the royalty rate calculated by the formula in Section 4 of the Licensed Technology Schedule multiplied by Net Sales of copies of such Device, (that incorporate(s) a royalty-bearing Sonics IP Core) sold (or distributed by barter, exchange or similar disposition) by Licensee or its Affiliates.

• This fee is due and payable upon receipt of a Commencement Notice for each Device incorporating a Synapse 3220 IP Core.

• In the event Licensee sells Devices incorporating one or more different Sonics IP Cores (e.g., an SB IP Core and a Synapse 3220 IP Core), Licensee shall only have to pay a royalty equal to the highest royalty rate from any one (1) IP Core incorporated in such Devices.

• No multiple royalties shall be payable or due because any single Device incorporates more than one (1) Sonics IP Core.

• Synapse™ 3220 IP Core Synapse 3220 is a peripheral interconnect optimized to provide low-latency access to a large number of low bandwidth, low speed target IP cores.

• Latency is measured between the IP Core Network and Access Port and does not apply to local access circuits.

• PDR is a ratio of successful IP packet receptions to attempted IP packet transmissions  PDR excludes packets, which are not delivered due in whole or in part to factors unrelated to Verizon’s Private IP Core Network.

• The LICENSEE shall not modify or create derivative works of the EtherCAT IP Core or the Qsys Subsystem or use the content of the EtherCAT IP-Core or the Qsys Subsystem to create, manufacture, distribute or sell products containin EtherCAT Technology The LICENSEE shall not use some content of the EtherCAT IP Core or the Qsys Subsystem to create, manufacture, distribute or sell EtherCAT Slave Controller products.

• You are not permitted to program Altera Devices or non-Altera Devices using any IP Core obtained through the OpenCore Evaluation Program.

More Definitions of IP Core

IP Core or “IP Cores” shall mean the Licensor’s IP cores as provided on the marketplace of Amazon Web Services.

IP Core or “Licensed Materials” shall mean all Zipcores design data files in Source Code format.

IP Core means the building block for use within FPGA or ASIC designs offered as synthesizable RTL. IP Core includes but is not limited to any IntelliProp provided RTL, software, firmware, reference design, reference code, bitstream, test, testbench, or script.

IP Core means a product in electronic format that represents an integrated circuit function that can be instantiated in an integrated circuit design, including the circuits and modules of such integrated circuit design(s) and associated firmware, application programming interfaces, Software drivers, application-specific Software and all register transfer language (RTL), verilog and other source materials to instantiate, modify, support and maintain any of the foregoing. An IP Core may be a soft core, synthesizable using conventional design tools, or a hard core, in a non-synthesizable format suitable only for implementation in a specific manufacturing process;