Performance Results Clause Samples
The Performance Results clause defines the standards or metrics by which a party’s work or deliverables will be evaluated under the agreement. Typically, it outlines specific criteria, benchmarks, or key performance indicators that must be met, such as completion deadlines, quality thresholds, or output levels. This clause ensures that both parties have a clear understanding of what constitutes satisfactory performance, thereby reducing disputes and providing a basis for measuring compliance or triggering remedies if expectations are not met.
Performance Results. (a) For each Performance Requirement, the number of RSUs that vest based on the achievement of that Performance Requirement’s Performance Goals at Threshold, at Target and at Maximum is the Performance Component Range of RSUs set forth in the Participant’s Award Certificate at Threshold, at Target and at Maximum, respectively, multiplied by that Performance Requirement’s Weighting, rounded down to the nearest whole number.
(b) In the event that the Company’s actual performance does not meet the Threshold for a Performance Requirement, no RSUs shall be earned for such Performance Requirement.
(c) If the Company’s actual performance for the Performance Period is between Threshold and Target for the Performance Requirement, the number of earned RSUs for that Performance Requirement shall be determined using straight line interpolation between the Threshold Number and the Target Number from the Participant’s Performance Component Range of RSUs set forth in the Participant’s Award Certificate, rounded down to the nearest whole number.
(d) If the Company’s actual performance for the Performance Period is between Target and Maximum for the Performance Requirement, the number of earned RSUs for that Performance Requirement shall be determined using straight line interpolation between the Target Number and the Maximum Number from the Participant’s Performance Component Range of RSUs set forth in the Participant’s Award Certificate, rounded down to the nearest whole number.
(e) If the Company’s actual performance for the Performance Period is above Maximum for a Performance Requirement, the number of earned RSUs shall be the Maximum Number from the Participant’s Performance Component Range of RSUs set forth in the Participant’s Award Certificate.
Performance Results. The current section summarizes the achieved performance results w.r.t. through- put and size. We depict in Tables 4 and 5 the performance figures of the works described in Sect. 2. As mentioned, we outperform prior art on the same archi- tecture between 2.5 and 21.2 times [23]. Table 4. PRESENT implementations, comparison with prior art (performance) Work Implementation Bitslicing Bitslicing factor Protected Platform No. cycles per block This work PRESENT-80 yes 32 yes ARM Cortex–M4 6,532 [23] PRESENT-80, CBC no - no ATmega 121,906 [23] PRESENT-80, CBC no - no MSP430 100,786 [23] PRESENT-80, CBC no - no ARM Cortex-M3 138,947 [23] PRESENT-80, CTR no - no ATmega 15,239 [23] PRESENT-80, CTR no - no MSP430 12,226 [23] PRESENT-80, CTR no - no ARM 16,919 [37] PRESENT-80 no - no ATiny 8,721 [41] PRESENT-80 yes 8 no ATMega163 78,403 [41] PRESENT-80, DPL yes 8 yes ATMega163 235,427 [38] PRESENT-80 yes 8 no ATiny85 2,967 [5] PRESENT-80, table no - no Corei3-2367M 988 [5] PRESENT-80, vperm yes 2 no Corei3-2367M 890 [5] PRESENT-80 yes 8 no Corei3-2367M 2,039 [5] PRESENT-80 yes 16 no Corei3-2367M 3,138 [34] PRESENT-80 yes 32 no Xeon E3-1280 37.84 [34] PRESENT-80 yes 16 no Xeon E3-1280 52.16 [34] PRESENT-80 yes 8 no Xeon E3-1280 67.68 [17] PRESENT-80 no - no MSP430 364,587 [39] PRESENT-80 no - no ATAM893-D 55,734 [39] PRESENT-80 no - no ATMega163 10,089 [39] PRESENT-80 no - no C167CR 19,460 As expected, the ISW implementation of the Sbox dominated CPU time, accounting for 95,88% of all clock cycles within the encryption process. A com- plete breakdown of the memory and time overheads required for different mod- ules is provided in Table 6. Table 5. PRESENT implementations, comparison with prior art (size) Work Implementation Code (bytes) RAM (bytes) This work PRESENT-80 1,548 1,644 [38] PRESENT-80 3,816 256 [39] PRESENT-80, ATMega 1,494 272 [39] PRESENT-80, C167CR 3 45.9·10 - [23] PRESENT-80, CBC, ATMega 1,388 56 [23] PRESENT-80, CBC, MSP430 1,108 52 [23] PRESENT-80, CBC, ARM 1,304 124 [23] PRESENT-80, CTR, ATMega 1,416 54 [23] PRESENT-80, CTR, MSP430 1,244 58 [23] PRESENT-80, CTR, ARM 1,532 140 [37] PRESENT-80 1,794 - [41] PRESENT-80, bitslicing 1,620 288 [41] PRESENT-80, bitslicing + DPL 3,056 352 Table 6. SW transformations of common logical operations Operation Code size (%) No. cycles (%) main 208 (13.44) 3,807 (1.82) sbox 892 (57.62) 200,404 (95.88) updatekey 146 (9.43) 1,688 (0.81) addroundkey 176 (11.37) 1,209 (0.58) split data 60 (3.88) 1,292 (0.62) unsplit dat...
Performance Results. A review of the results of the Organizational Performance Improvement Snapshot Assessment reveals that in the category of business results scores ranged from 3.1 to 4.
Performance Results. A review of the resutls of the Organizational Performance Improvement Snapshot Assessment reveals that in the category of performance results scores ranged from 3.2 to 4.5. The item with the highest score in this category indicates that faculty and staff are satisfied with their job within Instructional Systemwide. The item with the lowest score is related to to knowing about the financial status of the school. The results seem to indicate that the faculty and staff do not understand the school budget and would benefit from opportunities which allow for the sharing budget information. Learning and completion at all levels, including increased high school graduation and readiness for postsecondary education Student Performance Alignment of Standards and Resources Educational Leadership Workforce Education Parental, Student, Family, Educational Institution, and Community Involvement
Performance Results. (a) For each Performance Requirement, the Number of Shares that vest and become Earned Shares based on the achievement of that Performance Requirement’s Performance Goals at threshold, target and maximum is equal to the product of (i) the Number of Shares subject to the Award; (ii) the Performance Range set forth in the Participant’s Award Certificate at threshold, target or maximum, respectively; and (iii) the Performance Requirement’s Weighting Percentage, rounded down to a whole number.
(b) In the event that the Company’s actual performance for the Performance Period does not meet the threshold for a Performance Requirement, no Shares shall be Earned Shares for such Performance Requirement.
(c) If the Company’s actual performance for the Performance Period is between threshold and target for the Performance Requirement, the number of Earned Shares for that Performance Requirement is equal to the product of: (i) the Number of Shares subject to the Award; (ii) the actual performance achievement, determined using straight line interpolation between the threshold and the target from the Participant’s Performance Range set forth in the Participant’s Award Certificate; and (iii) the Performance Requirement’s Weighting Percentage, rounded down to a whole number.
(d) If the Company’s actual performance for the Performance Period is between target and maximum for the Performance Requirement, the number of Earned Shares for that Performance Requirement is equal to the product of: (i) the Number of Shares subject to the Award; (ii) the actual performance achievement, determined using straight line interpolation between the target and maximum from the Participant’s Performance Range set forth in the Participant’s Award Certificate; and (iii) the Performance Requirement’s Weighting Percentage, rounded down to a whole number.
(e) If the Company’s actual performance for the Performance Period is at or above maximum for a Performance Requirement, the number of Earned Shares is equal to the product of: (i) the Number of Shares subject to the Award; (ii) the Performance Range set forth in the Participant’s Award Certificate at maximum; and (iii) the Performance Requirement’s Weighting Percentage, rounded down to a whole number.
(f) The total number of Number of Shares that become Earned Shares shall be the sum of the number of Earned Shares for each Performance Requirement.
Performance Results. In this section we present a few numerical results produced on the 8K Con- nection Machine CM–200 located at UNI•C. The programs were all coded in CM Fortran, Version CMF 1.2.