Common use of Management Interface Pins Clause in Contracts

Management Interface Pins. ‌ The CFP4 Module supports alarm, control and monitor functions via an MDIO bus. Upon module initialization, these functions are available. CFP4 MDIO electrical interface consists of 6pins including 2pins for MDC and MDIO, 3 Physical Port Address pins and th Global Alarm pin. MDC is the MDIO Clock line driven by the host and MDIO is the bidirectional data line driven by both the host and module depending upon the data directions. The CFP4 MDIO pins are listed in Table 1-3. Specifications of the CFP4 hardware management interface pins are given in Ref.[2] with the following changes listed below. Table 1-3: Management Interface Pins (MDIO) Pin # Symbol Description I/O Logic “H” “L” Pull-up /down 13 GLB_ALRMn Global Alarm O 3.3V LVCMOS OK Alarm 18 MDIO Management Data Input Output Bi-Directional Data I/O 1.2V LVCMOS 19 PRTADR0 MDIO Physical Port address bit 0 I 1.2V LVCMOS per CFP MSA MIS Ref. [3] 20 PRTADR1 MDIO Physical Port address bit 1 I 1.2V LVCMOS 21 PRTADR2 MDIO Physical Port address bit 2 I 1.2V LVCMOS

Management Interface Pins. ‌ The CFP4 Module supports alarm, control and monitor functions via an MDIO bus. Upon module initialization, these functions are available. CFP4 MDIO electrical interface consists of 6pins including 2pins for MDC and MDIO, 3 Physical Port Address pins and th Global Alarm pin. MDC is the MDIO Clock line driven by the host and MDIO is the bidirectional data line driven by both the host and module depending upon the data directions. The CFP4 MDIO pins are listed in Table 1-3. Specifications of the CFP4 hardware management interface pins are given in Ref.[2] with the following changes listed below. Table 1-3: Management Interface Pins (MDIO) Pin # Symbol Description I/O Logic “H” “L” Pull-up /down 13 GLB_ALRMn Global Alarm O 3.3V LVCMOS OK Alarm 18 MDIO Management Data Input Output Bi-Directional Data I/O 1.2V LVCMOS 19 PRTADR0 MDIO Physical Port address bit 0 I 1.2V LVCMOS per CFP MSA MIS Ref. [3] 20 PRTADR1 MDIO Physical Port address bit 1 I 1.2V LVCMOS 21 PRTADR2 MDIO Physical Port address bit 2 I 1.2V LVCMOS