Chip Design(s) definition
Chip Design(s) means any design of one or more Integrated Circuits and/or Semiconductor Products, including (by way of example and not limitation) random access memory (RAM)s, read only memory (ROM)s, microprocessors, application specific Integrated Circuits (ASICs) and other logic designs, and analog circuitry; provided, however, that "Chip Designs" shall not include (i) alignment marks or test structures and associated layout and data used in the Process Development Projects for process development, (ii) process kerf test structures, layout, and data of the test chip(s) (including SRAM or ROM macro cells) as well as such test chips themselves used for the development work of the Process Development Projects unless specifically excluded, or (iii) other product designs as mutually agreed by the Parties to be used as qualification vehicles in the Process Development Projects. For the avoidance of doubt, all of (i) through (iii) above shall be treated as Specific Results to the extent utilized in a Process Development Project.
Chip Design(s) means any design of one or more Integrated Circuits and/or Semiconductor Products, including (by way of example and not limitation) random access memory (RAM)s, read only memory (ROM)s, microprocessors, application specific Integrated Circuits (ASICs) and other logic designs, and analog circuitry; provided, IBM CONFIDENTIAL 2 Joint Development Project Agreement Final Version 22nm Bulk-Industry Standard Semiconductor Process Technology however, that “Chip Designs” shall not include (i) alignment marks or test structures and associated layout and data used in the Development Projects for process development, (ii) process kerf test structures, layout, and data of the test chip(s) (including SRAM or ROM macro cells) as well as such test chips themselves used for the development work of the Development Projects unless any of the foregoing items are specifically excluded (for clarity, to “specifically exclude” such an item means it is included in the definition of Chip Design), or (iii) other product designs as mutually agreed by the Parties to be used as qualification vehicles in the Development Projects unless specifically excluded (for clarity, to “specifically exclude” a product design means it is included in the definition of Chip Design), or (iv) ESD protection devices as used in the project Test Sites and ESD groundrules and models as defined in the Documentation. For the avoidance of doubt, all of (i) through (iv) above shall be treated as Specific Results to the extent utilized in a Development Project.
Chip Design(s) means any design of one or more Integrated Circuits and/or Semiconductor Products, including (by way of example and not limitation) random access memory (RAM)s, read only memory (ROM)s, microprocessors, ASICs and other logic designs, and analog circuitry; provided, however, that “Chip Designs” shall not include (i) alignment marks or test structures and associated layout and data used in the Process Development Projects for process development, (ii) process kerf test structures, layout, and data of the test chip(s) (including SRAM macro cells) as well as such test chips themselves used for the development work of the Process Development Projects unless specifically excluded (for the avoidance of doubt, this phrase means that such structures or macros that are specifically designated as owner proprietary shall not be considered Specific Results), (iii) other product designs as mutually agreed by the Parties to be used as qualification vehicles in the Process Development Projects, or (iv) ESD protection devices as used in the Project Test Sites and ESD groundrules and models as defined in the Design Manual. For the avoidance of doubt, all of (i) through (iv) above shall be treated as Specific Results to the extent utilized in a Process Development Project.
Examples of Chip Design(s) in a sentence
For the avoidance of doubt, none of the Process Development Projects shall include the development of i) Proprietary Tools, ii) Packaging Technology, iii) Mask Fabrication and Photoresist Technology, iv) Memory, v) SiGe Technology, or vi) Chip Designs.
For the avoidance of doubt, such patent license shall not extend to patents that claim Chip Designs.
For the avoidance of doubt, none of the Process Development Projects shall include the development of i) Proprietary Tools, ii) Packaging Technology, iii) Mask Fabrication and Photoresist Technology, iv) Memory, v) SiGe Technology, vi) Chip Designs, or vii) Post-Silicon Devices.
For the avoidance of doubt, none of the Process Development Projects shall include the development of i) Proprietary Tools, ii) Packaging Technology, iii) Mask Fabrication and Photoresist Technology, iv) Stand Alone Memory, v) SiGe Technology, vi) Chip Designs, or vii) Post-Silicon Devices.
More Definitions of Chip Design(s)
Chip Design(s) means any design of one or more Integrated Circuits and/or Semiconductor Products, including (by way of example and not limitation) random access memory (RAM)s, read only memory (ROM)s, microprocessors, application specific Integrated Circuits (ASICs) and other logic designs, and analog circuitry; provided, however, that “Chip Designs” shall not include (i) alignment marks or test structures and associated layout and data used in the Development Projects for process development, (ii) process kerf test structures, layout, and data of the test chip(s) (including SRAM or ROM macro cells) as well as such test chips themselves used for the development work of the Development Projects unless any of the foregoing items are specifically excluded (for clarity, to “specifically exclude” such an item means it is included in the definition of Chip Design), or (iii) other product designs as mutually agreed by the Parties to be used as qualification vehicles in the Development Projects unless specifically excluded (for clarity, to “specifically exclude” a product design means it is included in the definition of Chip Design), or (iv) ESD protection devices as used in the project Test Sites and ESD groundrules and models as defined in the Documentation. For the avoidance of doubt, all of (i) through (iv) above shall be treated as Specific Results to the extent utilized in a Development Project.
Chip Design(s) means any design of one or more Integrated Circuits and/or Semiconductor Products, including (by way of example and not limitation) random access memory (RAM)s, read only memory (ROM)s, microprocessors, application specific Integrated Circuits (ASICs) and other logic designs, and analog circuitry; provided,
Chip Design(s) means the designs for Products and the related materials and documentation of any kind relating to the designs for Products, and the Intellectual Property rights therein, including all architectural designs and diagrams, logic designs and diagrams, chip layouts and mask works, flow diagrams, patents, inventions, copyrights and know-how relating to the designs for Products. "CLOSING" means the consummation of the transactions contemplated by this Agreement in accordance with the provisions of Article 6. "CODE" shall mean the United States Internal Revenue Code of 1986, as amended. All references to the Code, U.S. Treasury regulations or other governmental pronouncements shall be deemed to include references to any applicable successor regulations or amending pronouncement. "CONSENTS" means all governmental consents and approvals, and all consents and approvals of third parties, in each case that are necessary in order to transfer record and beneficial ownership in the Acquired Assets to Buyer and otherwise to consummate the transactions contemplated hereby. "CONTRACTS" means all agreements, contracts, or other binding commitments or arrangements, written or oral (including any amendments and other modifications thereto), to which Seller is a party or is otherwise bound and which affect or relate to the Acquired Assets or the Business. "DEBT," without duplication, means (a) all indebtedness (including the principal amount thereof or, if applicable, the accreted amount thereof and the amount of accrued and unpaid interest thereon) of Seller, whether or not represented by bonds, debentures, notes or other securities, for the repayment of money borrowed, (b) all deferred indebtedness of Seller for the payment of the purchase price of property or assets purchased, other than Trade Payables not more than 90 days past due, (c) all obligations of Seller to pay rent or other payment amounts under a lease of real or personal property which is required to be classified as a capital lease or a liability on the face of a balance sheet prepared in accordance with GAAP, (d) any outstanding reimbursement obligation of Seller with respect to letters of credit, bankers' acceptances or similar facilities issued for the account of Seller, (e) any payment obligation of Seller under any interest rate swap agreement, forward rate agreement, interest rate cap or collar agreement or other financial agreement or arrangement entered into for the purpose of limiting or managing intere...
Chip Design(s) means any design of one or more Integrated Circuits and/or Semiconductor Products, including (by way of example and not limitation) random access memory (RAM)s, read only memory (ROM)s, microprocessors, ASICs and other logic designs, and analog circuitry; provided, however, that “Chip Designs” shall not include (i) alignment marks or test structures and associated layout and data used in the Process Development Projects for process development, (ii) process kerf test structures, layout, and data of the test chip(s) (including ***Confidential Treatment Requested. Third Amendment and Restatement of “S” Process Development Agreement between AMD and IBM SRAM macro cells and eDRAM macros) as well as such test chips themselves used for the development work of the Process Development Projects unless specifically excluded (for the avoidance of doubt, this phrase means that such structures or macros that are specifically designated as owner proprietary shall not be considered Specific Results), (iii) other product designs (including eDRAM macros) as mutually agreed by the Parties to be used as qualification vehicles in the Process Development Projects, or (iv) ESD protection devices as used in the Project Test Sites and ESD groundrules and models as defined in the Design Manual. For the avoidance of doubt, all of (i) through (iv) above shall be treated as Specific Results to the extent utilized in a Process Development Project.
Chip Design(s) is defined in the Project Agreement, as applicable.