Planned demonstrators Clause Samples

Planned demonstrators. After the first 12 month (April 2015) the first prototype will demonstrate a working HW platform to be used for FPGA based implementation of Video Algorithms. In addition the first implementations of video algorithms for the different use cases will be available. At m33 (Dec 2016) the design process shall be complete and integrate the algorithmic work together with the design process. The purpose of the m33 demonstrator is to show that the example algorithms can be deployed to the proposed platform. At month 20 (Nov 2015) the first prototype will demonstrate the capabilities of the middleware to ▇▇▇▇▇▇ the use-case “Passenger Tracking” by monitoring the system. The system will consist of a limited number of processing and sensor units. The middleware will be able to cope with some dynamic changes. The prototype will be demonstrated in the first EMC2 workshop held in or after month 20.
Planned demonstrators. The planned demonstrators intend to visualize and showcase the research results gained in this use case. In particular three main topics are addressed:  Safety concept for multi-core usage in the railway domain  Novel Programming Paradigms  Virtualization with PikeOS
Planned demonstrators. The healthcare demonstration applies the EMC² technology in several healthcare situations involving medical images. The healthcare applications, served by the demonstrator, cover medical diagnostic and intervention support systems. In interventional situations real-time processing is crucial. For efficiency reasons we need to be able to host several applications, with diverse latency and performance requirements on a single chip or board solution. This means co-location of real-time and non-real-time processing on a single chip/board. The algorithms that will run on the EMC² many-core execution platform involve massive image processing of different kinds (like noise reduction, image segmentation, image fusion etc.), but the background processing of the same piece of hardware deals amongst others with user interface, workflow support, decision support, administrative tasks, and (image) data storage and transfer. To ease portability, the demonstrators are built using domain-specific abstractions of the image processing algorithms.
Planned demonstrators. A single demonstrator will illustrate all the results obtained in the current task. The demonstrator will describe the development of the mentioned application with the support of an open tool chain addressing tool independence and multi core design space exploration.